Flash memory device

The present invention relates to a flash memory device. The flash memory device comprises a flash memory cell array; a multiplexer for selecting bit lines of said flash memory cell array; a decoder for selecting word lines of said flash memory cell array depending on global word line signals, a control signal, local word line signals and pre-decoding signals; an internal voltage generator for generating a given internal voltage; and a source control unit for applying the internal voltage from said internal voltage generator to sources of a not-selected flash memory cell depending on the global word line signals, a sector program signal, a sector coding signal and a readout signal. Therefore, the present invention can increase the threshold voltage of a not-selected cell and can compensate for reduction in the threshold voltage of the not-selected cell by a drain coupling depending on a drain voltage supplied to bit lines of a selected cell. Thus, the present invention can reduce the chip size and improve the program speed.