Device and method for testing phase-locked loops
A phase-locked loop (PLL) is tested based on a divide-and-conquer strategy. First, digital components in the PLL are isolated from analog components and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causing it to undergo a series of frequency...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A phase-locked loop (PLL) is tested based on a divide-and-conquer strategy. First, digital components in the PLL are isolated from analog components and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causing it to undergo a series of frequency transitions. |
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