Inspection apparatus

An inspection apparatus in which the environment for inspecting a semiconductor wafer or the like at a high degree of cleanness to enable a fine pattern to be inspected properly. A main body portion 10 for inspecting the semiconductor wafer or the like is housed in the inside of a clean box 3 and cl...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	MIYASHITA TAKETO, SUZUKI YASUYUKI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES MEASURING MEASURING ANGLES MEASURING AREAS MEASURING IRREGULARITIES OF SURFACES OR CONTOURS MEASURING LENGTH, THICKNESS OR SIMILAR LINEARDIMENSIONS PHYSICS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS TESTING
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	An inspection apparatus in which the environment for inspecting a semiconductor wafer or the like at a high degree of cleanness to enable a fine pattern to be inspected properly. A main body portion 10 for inspecting the semiconductor wafer or the like is housed in the inside of a clean box 3 and clean air is supplied from the clean air unit 4 into the inside of the clean box 3 in which the main body portion 10 is accommodated. There are provided opening areas 80 in lateral sides of the clean box 3 lying laterally of the inspection stage 14 for the main body portion 10 and the vessel mounting space 8. The clean air supplied from the clean air unit 4 into the inside of the clean box is passed over the inspection stage carrying the semiconductor wafer and through the cassette 7b mounted in the vessel mounting space 8 so as to be discharged from the opening areas 80 to outside of the clean box 3. This effectively prohibits contaminants produced in the clean box 3 from being affixed to the semiconductor wafer mounted on the inspection stage 14 or to the semiconductor wafer loaded in the cassette 7b.