Method for resisting an FPGA interface device
A method is disclosed for communicating with an FPGA interface device having a microcontroller when the on-board microcontroller is not responsive to commands from a host system. If the host system determines that the microcontroller is not responsive to commands, the host system sends a null charac...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A method is disclosed for communicating with an FPGA interface device having a microcontroller when the on-board microcontroller is not responsive to commands from a host system. If the host system determines that the microcontroller is not responsive to commands, the host system sends a null character to the interface device at a predetermined baud rate which is significantly distinguishable from baud rates normally used for communicating with the microcontroller. A logic circuit on the interface device monitors the baud rate of incoming data, and if a null character at the predetermined baud rate is detected, the logic circuit toggles the reset pin of the microcontroller. In response thereto, the microcontroller re-boots itself, and is thereafter able to communicate with the host system. Additional commands are provided to the interface device by using other baud rates which are significantly distinguishable from the baud rates normally used. |
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