Dual-die package structure and method for fabricating the same

A dual-die packaging technology is proposed to pack two semiconductor chips in one single package module, so that one single package module is capable of offering a doubled level of functionality or data storage capacity. The proposed dual-die packaging technology is characterized in the use of a face-to-face stacked dual-die construction to pack two integrated circuit chips, such as flash memory chips, in one single package module. The first semiconductor die has its non-circuit surface attached to the front side of the die pad of the leadframe, while the second semiconductor die has its circuit surface attached by means of adhesive layer to the circuit surface of the first semiconductor die, thus forming a face-to-face stacked dual-die construction over the die pad of the leadframe, allowing one single package module to offer a doubled level of functionality or data storage capacity.