A/D converter
An analog input voltage signal to be A/D-converted is supplied to a ring gate delay circuit including inverting circuits connected in series in a ring as a supply voltage thereto. The interval for which a pulse circulates the ring varies with the analog input voltage signal. The number of times circ...
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| creator | NISHII KATSUYOSHI WATANABE TAKAMOTO |
| description | An analog input voltage signal to be A/D-converted is supplied to a ring gate delay circuit including inverting circuits connected in series in a ring as a supply voltage thereto. The interval for which a pulse circulates the ring varies with the analog input voltage signal. The number of times circulation of the pulse and the position of the pulse for a predetermined interval are detected by a counter to provide upper bits and by a pulse position detector to provide lower bits of A/D conversion result of the analog input voltage signal, respectively. The counter and the pulse position detector are included in a coding process block which is driven by a constant voltage which is different from the analog input voltage signal to the ring gate delay circuit. |
| format | Patent |
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The interval for which a pulse circulates the ring varies with the analog input voltage signal. The number of times circulation of the pulse and the position of the pulse for a predetermined interval are detected by a counter to provide upper bits and by a pulse position detector to provide lower bits of A/D conversion result of the analog input voltage signal, respectively. The counter and the pulse position detector are included in a coding process block which is driven by a constant voltage which is different from the analog input voltage signal to the ring gate delay circuit.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20021015&DB=EPODOC&CC=US&NR=6466151B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20021015&DB=EPODOC&CC=US&NR=6466151B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NISHII KATSUYOSHI</creatorcontrib><creatorcontrib>WATANABE TAKAMOTO</creatorcontrib><title>A/D converter</title><description>An analog input voltage signal to be A/D-converted is supplied to a ring gate delay circuit including inverting circuits connected in series in a ring as a supply voltage thereto. The interval for which a pulse circulates the ring varies with the analog input voltage signal. The number of times circulation of the pulse and the position of the pulse for a predetermined interval are detected by a counter to provide upper bits and by a pulse position detector to provide lower bits of A/D conversion result of the analog input voltage signal, respectively. The counter and the pulse position detector are included in a coding process block which is driven by a constant voltage which is different from the analog input voltage signal to the ring gate delay circuit.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOB11HdRSM7PK0stKkkt4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBZiZmZoamhk5GxkQoAQDSUB1s</recordid><startdate>20021015</startdate><enddate>20021015</enddate><creator>NISHII KATSUYOSHI</creator><creator>WATANABE TAKAMOTO</creator><scope>EVB</scope></search><sort><creationdate>20021015</creationdate><title>A/D converter</title><author>NISHII KATSUYOSHI ; WATANABE TAKAMOTO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6466151B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>NISHII KATSUYOSHI</creatorcontrib><creatorcontrib>WATANABE TAKAMOTO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NISHII KATSUYOSHI</au><au>WATANABE TAKAMOTO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>A/D converter</title><date>2002-10-15</date><risdate>2002</risdate><abstract>An analog input voltage signal to be A/D-converted is supplied to a ring gate delay circuit including inverting circuits connected in series in a ring as a supply voltage thereto. The interval for which a pulse circulates the ring varies with the analog input voltage signal. The number of times circulation of the pulse and the position of the pulse for a predetermined interval are detected by a counter to provide upper bits and by a pulse position detector to provide lower bits of A/D conversion result of the analog input voltage signal, respectively. The counter and the pulse position detector are included in a coding process block which is driven by a constant voltage which is different from the analog input voltage signal to the ring gate delay circuit.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY |
| title | A/D converter |
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