Single-level store computer incorporating process-local address translation data structures

An apparatus, program product, and method perform address translation on a process-local, rather than system-wide, basis in a single-level store virtual memory management system using a plurality of process-local address translation data structures that are individually associated with particular so...

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1. Verfasser: LOEN LARRY WAYNE
Format: Patent
Sprache:eng
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Zusammenfassung:An apparatus, program product, and method perform address translation on a process-local, rather than system-wide, basis in a single-level store virtual memory management system using a plurality of process-local address translation data structures that are individually associated with particular software processes executing on a computer. By performing address translation on a process-by-process basis, many of the security concerns associated with system-wide address translation, e.g., attempting to access a virtual address for memory that has not been allocated for the associated process, are significantly reduced from the standpoint of accessing an address translation data structure, since it can be presumed that all of the information in a process-local address translation data structure was previously authorized for the process when added to the data structure. Relatively simpler and faster security checks can then be performed in association with accessing a process-local address translation data structure to minimize the processing delays associated with such accesses. In addition, with such a configuration, any additional security issues can be handled in additional fault handling processing that is executed less frequently than accesses to address translation data structures, such that such additional security processing has a reduced impact on system performance.