Multistage converter employing digital dither

A multistage converter and method for converting a sampled analog signal to a corresponding digital representation. Each stage of the converter receives an analog input signal and produces a partial digital output. A first stage receives the sampled analog signal as the analog input signal. Each stage provides a residue output, which is the analog input signal to a subsequent stage. The residue is the analog input signal to the stage, less the analog equivalent of the partial digital output from the stage, possibly with a gain change. A voltage range over which a sample of an analog signal can vary is defined by a lower limit and an upper limit. A lower comparator threshold is established within the voltage range. An upper comparator threshold is established within the voltage range, between the lower comparator threshold and the upper limit. The analog input to the stage is quantized based on the lower and upper comparator thresholds to generate a quantized sampled analog signal. When the quantizes sampled analog signal is between the lower and upper comparator thresholds, dither is added to the quantized sampled analog signal to produce the partial digital output. The partial digital outputs from each stage are provided to an error corrector circuit that removes redundancy and effects of the dither and generates the digital representation corresponding to the sampled analog input. The effect of dither is to improve the spurious free dynamic range (SFDR) of the digital representation of the analog input.