Linearized digital phase-locked loop

An apparatus for synchronizing a clock signal to a data signal. The apparatus comprises a detector and a control circuit. The detector may be configured to produce a value representing a position of an edge of said data signal based upon a state of said clock signal. The control circuit may be confi...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WILLIAMS BERTRAND J, DALMIA KAMAL, JORDAN TIMOTHY D, LITTLE TERRY D
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An apparatus for synchronizing a clock signal to a data signal. The apparatus comprises a detector and a control circuit. The detector may be configured to produce a value representing a position of an edge of said data signal based upon a state of said clock signal. The control circuit may be configured to adjust the clock signal based upon the value.