Dynamic random access memory

In order to reduce power consumption in a dynamic random access memory (DRAM), block selection information RBDATA indicating whether or not individual blocks in a memory cell array require a refresh is stored at means for latching 20-1 and 20-2. A circuit for operation prohibition 30 compares a portion RA8 of a refresh address output by a refresh counter 6 with refresh block specification signals RB (0) and RB (1) output by the circuit for latching 20-1 and 20-2, makes a decision as to whether or not the block indicated by the refresh address needs to be refreshed and prohibits an operation of an RAS system circuit 11 if it is decided that the block does not need to be refreshed. Thus, a self refresh is not performed for a block that does not need to be refreshed to achieve a reduction in power consumption.