Method for reconfiguring a field programmable gate array from a host

A method is disclosed for reconfiguring an on-board FPGA of an interface device without resetting the interface device. The FPGA interface device also includes a microcontroller, and the on-board FPGA has a serial data port coupled to a first, non-volatile memory and a parallel data port coupled to a second memory, which may be a volatile memory. The default configuration design is stored in the non-volatile memory. The on-board FPGA is initially in a serial configuration mode such that upon power-up, the on-board FPGA looks to the first memory via its serial port for the configuration design. Where it is desired to reconfigure the on-board FPGA, a new configuration design is stored in the second memory, and the on-board FPGA is instructed to reconfigure itself in parallel mode. In response thereto, the on-board FPGA looks to the second memory via its parallel port, retrieves the new configuration design, and then reconfigures itself accordingly.