Method of fabricating an electronic package with interconnected chips

Method of fabricating an electronic package with interconnected chips

An electronic package which includes a circuitized substrate with a cavity and a first semiconductor chip positioned therein. The first chip is electrically coupled to conductive members located on the circuitized substrate. A second semiconductor chip is positioned on and electrically coupled to th...

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Bibliographische Detailangaben
Hauptverfasser: LANZETTA ALPHONSO PHILIP, MONTOYE ROBERT KEVIN, SHAUKATULLA HUSSAIN, MILEWSKI JOSEPH MARYAN, HORTON RAYMOND ROBERT, MOK LAWRENCE S
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:An electronic package which includes a circuitized substrate with a cavity and a first semiconductor chip positioned therein. The first chip is electrically coupled to conductive members located on the circuitized substrate. A second semiconductor chip is positioned on and electrically coupled to the first chip.