Wafer edge polish

The present invention is directed to a method for manufacturing semiconductor devices. The method generally comprises forming a plurality of process layers on a wafer 14. The wafer has an edge region 20 with a number of defects 26 existing thereon. Thereafter, the method comprises removing all or a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	BLACK HANG THI YEN, EHRICHS EDWARD E
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS DRESSING OR CONDITIONING OF ABRADING SURFACES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS GRINDING MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING PERFORMING OPERATIONS POLISHING SEMICONDUCTOR DEVICES TRANSPORTING
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Beschreibung
Zusammenfassung:	The present invention is directed to a method for manufacturing semiconductor devices. The method generally comprises forming a plurality of process layers on a wafer 14. The wafer has an edge region 20 with a number of defects 26 existing thereon. Thereafter, the method comprises removing all or a substantial portion of the defects 26 on the edge region 20 of the wafer 14.