Method of sectioning of photoresist for shape evaluation

A non-destructive method for evaluating a topographical feature 16 of an integrated circuit 42, such as a photoresist runner, includes core sectioning the feature to remove a small section 22, without damage to the remainder of the wafer 36 on which the integrated circuit is formed. A tool having fi...

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Bibliographische Detailangaben
Hauptverfasser:	MCINTOSH JOHN M, MOLLOY SIMON J, VARTULI CATHERINE, KANE BRITTIN C, HOUGE ERIK C
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS
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Beschreibung
Zusammenfassung:	A non-destructive method for evaluating a topographical feature 16 of an integrated circuit 42, such as a photoresist runner, includes core sectioning the feature to remove a small section 22, without damage to the remainder of the wafer 36 on which the integrated circuit is formed. A tool having fine adjustment, such as a micromanipulator with a rod-shaped probe 24 in the form of a glass needle, is used to remove the section for examination and metrology. The section is separated from the underlying substrate surface 14 and can be examined from all sides. Variations in a critical dimension, such as line width W, along the length L of the section, as well as average measurements of the dimension, can be obtained.