Method and system for making internal states of an integrated circuit visible during normal operation without the use of dedicated I/O pins

A system includes a first integrated circuit and a second integrated circuit coupled by at least one signal line. The first integrated circuit outputs on the signal line an interleaved output signal including both operating data and debug data. The second integrated circuit receives as an input signal, of the operating data and the debug data, only the operating data. In this manner, the internal states of the first integrated circuit are made visible during normal operation of the system without the use of dedicated I/O pins.