Nonvolatile memory cell with multiple gate oxide thicknesses
A nonvolatile memory cell (500) has multiple oxide thicknesses, a tunnel oxide portion (625) and thicker gate oxide portion (630). The memory cell (500) may be used to form compact arrays of memory cells to store logical data. During programming of a selected memory cell, unselected memory cells are...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A nonvolatile memory cell (500) has multiple oxide thicknesses, a tunnel oxide portion (625) and thicker gate oxide portion (630). The memory cell (500) may be used to form compact arrays of memory cells to store logical data. During programming of a selected memory cell, unselected memory cells are not disturbed, and oxide stress for the unselected memory cells is minimized. Techniques for operating programming, erasing, and characterizing the memory cell with multiple oxide thicknesses are discussed. |
---|