On-chip misalignment indication
An on-chip misalignment indicator for measuring misalignment between layers of an integrated circuit die employs a first contact, and a second contact. A current path between the first and second contacts having a resistance that varies as a function of misalignment between successive layers of the...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | An on-chip misalignment indicator for measuring misalignment between layers of an integrated circuit die employs a first contact, and a second contact. A current path between the first and second contacts having a resistance that varies as a function of misalignment between successive layers of the integrated circuit die. Similarly, a method for detecting misalignment between layers of an integrated circuit die involves passing and measuring a current between a first contact. The amount of the current being indicative of an amount of misalignment between layers of the integrated circuit die. |
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