Semiconductor device and manufacturing method thereof including a probe test step and a burn-in test step

Dispersion of a load may be kept within a predetermined allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane against a wafer by applying a pressure load to a plurality of places on a plane of the pressure members on the side opp...

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Hauptverfasser: MORI TERUTAKA, KITANO MAKOTO, SHIBUYA SHUJI, KOHNO RYUJI, ARIGA AKIHIKO, SHIGI HIDETAKA, KASUKABE SUSUMU, WADA YUJI, BAN NAOTO, MOTOYAMA YASUHIRO, MATSUMOTO KUNIO, KUMAZAWA TETSUO, WATANABE TAKAYOSHI
Format: Patent
Sprache:eng
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Zusammenfassung:Dispersion of a load may be kept within a predetermined allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane against a wafer by applying a pressure load to a plurality of places on a plane of the pressure members on the side opposite the wafer in a probe test step, burn-in test step which represent typical semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit at the same time.