Line card loss of battery detector

A line card circuit to prevent false off-hook signals resulting from the permanent loss of battery voltage at a line card. In the battery present condition, the 5V operating voltage is connected to the collector lead of an NPN transistor, which also supplies the output signal of the system. The emitter lead of the transistor is connected to ground. The -48V battery voltage is connected to the transistor base lead and biases the base negative with respect to the emitter, maintaining the 5V logic "1" output signal on the collector lead. There is a resistor and capacitor in series, forming an RC circuit, across the 5V collector lead and the -48V base lead. In the battery present condition, there is a significant charge across the capacitor. In the battery absent condition, the -48V battery voltage is lost and the voltage on the base lead rises to a positive voltage in a time interval governed by the discharge time of the RC circuit, thus causing the system output signal to drop to logic "0".