Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process

Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous f...

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Bibliographische Detailangaben
Hauptverfasser: OKAMOTO, YOSHIHIKO, MORIUCHI, NOBORU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Herein disclosed is an exposure technology for a semiconductor integrated circuit device which has a pattern as fine as that of an exposure wavelength. The technology contemplates to improve the resolution characteristics of the pattern by making use of the mutual interference of exposure luminous fluxes.