Variable slot configuration for multi-speed bus

A method and apparatus are provided in which a control scheme is implemented to enable a PCI bus to operate more than two PCI slots into which PCI devices may be installed. The PCI slots are checked to determine if a PCI device is installed in the slots and the speed at which the installed PCI devices are capable of running. If any of the slots has a 33 MHz device installed in any of the slots, the system is enabled to run more than two slots, and all of the PCI devices will run at 33 MHz. When no 33 MHz cards or devices are installed in the PCI slots, and PCI devices are only installed in the first two slots, then the system is enabled to run only the first two slots at the speed of 66 MHz. In one alternative embodiment, a default configuration routine sets the PCI bus speed at one of the operating frequencies and modifies that default if it is determined during a system configuration cycle that another speed is more appropriate.