Output buffer for a mixed voltage environment

An output buffer to serve as an interface between a main logic circuit and a peripheral device is described. The output buffer includes a first transistor adapted to be coupled to a first voltage supply and an output terminal. The first transistor is designed to charge the output terminal to a first state. A pull-down network to charge the output terminal to a second state is also included. The pull-down network is adapted to be coupled between the output terminal and a second voltage supply and is designed for alternate operation with the first transistor. The output buffer also includes a logic circuit to enable the first transistor and the pull-down network. The logic circuit is coupled to an enable terminal of the first transistor, the pull-down network, the first voltage supply, and the second voltage supply.