Integrated circuit package verification

A method and apparatus for automatically verifying the design of an IC package is provided. First, data specifying the location of solder balls on the IC device is compared to data specifying the physical location of corresponding pads on the package to determine whether the IC die physically matches the package. Then, data specifying electrical signals associated with the IC die is compared to data specifying electrical signals associated with the package to determine whether the IC die logically matches the package. Finally, data specifying electrical signals associated with pins on the package is compared to data specifying electrical signals associated with a socket to determine whether the package logically matches the socket. If the IC die physically and logically matches the package and if the package logically matches the socket, then the design of the IC package is verified.