Non-volatile memory element for programmable logic applications and operational methods therefor

An integrated circuit includes at least one non-volatile memory element having first and second non-volatile transistors connected in series between first and second data lines. A junction between the first and second non-volatile transistors forms an output node. The non-volatile memory element further includes an access transistor connected between a reference voltage line and the junction between the first and second non-volatile transistors. In a programmable logic application, for example a field programmable gate array, the non-volatile memory element controls the state of a switching element, which selectively connects logic elements in the programmable logic application. Based on the voltages applied to the non-volatile memory element, the non-volatile memory element is selectively erased, programmed, operated, monitored and powered-up.