Matched filter

A sample-hold circuit, which is constituted by a capacitor and a differential amplifier or a capacitor and an inversion amplifier, is provided with a first switch for short-circuiting the input and output, a second switch for switching the input-side terminal of the input capacitor to a reference voltage input, a third switch for switching the output-side terminal of the feedback capacitor to the reference voltage input, and a fourth switch for switching the input-side terminal of the input capacitor to an input voltage; thus a refreshing operation is available. Consequently, it is possible to compensate for deviations in offset voltage that are inherently caused by process deviations of MOS amplifiers, and to improve the precision of the output of the matched filter. Moreover, in addition to sample-hold circuits having conventional number of steps, a plurality of sample-hold circuits are added, and steps of shift registers, which have binary correlation filter coefficients stored therein, are also added as many as the same number of the added sample-hold circuits. Thus, during the refreshing operation, the extra circuits are used to carry out the process. With this arrangement, it becomes possible to provide a matched filter that is capable of refreshing the sample-hold circuits without adversely affecting the correlation output.