Circuit for testing pumped voltage gates in a programmable gate array

In a field programmable gate array, a test circuit for testing the signal path of a line, through a pass gate, and onto a second line. A memory cell outputs at a VGG level, where VGG>/=VDD+VTN. In order to dynamically test the signal path, three transistors and two test signals are used to apply...

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Bibliographische Detailangaben
Hauptverfasser: ERICKSON, CHARLES R, MEHROTRA, ALOK
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:In a field programmable gate array, a test circuit for testing the signal path of a line, through a pass gate, and onto a second line. A memory cell outputs at a VGG level, where VGG>/=VDD+VTN. In order to dynamically test the signal path, three transistors and two test signals are used to apply either 0 volts or VGG to control the pass gate. Two of the transistors are coupled to the memory cell and the pass gate, whereas the third transistor is coupled to the first and second transistors and ground. The two test signals and an inverter control these transistors so that the memory state can be changed to dynamically switch the pass gate according to the test configuration. An electrical signal is then sent through the signal path under test, and the result is monitored.