Method and system for layout and schematic generation for heterogeneous arrays

Method and system for layout and schematic generation for heterogeneous arrays

A method and system for defining, placing and routing kernels for a family of integrated circuits is provided. The integrated circuits are defined using repeatable row and column circuit types. Kernels are defined by the intersections of the row and column circuit types in the array. The kernels are...

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Bibliographische Detailangaben
Hauptverfasser: BERTOLET, ALLAN ROBERT, GOULD, SCOTT WHITNEY, KEYSER III, FRANK RAY, RENY, TIMOTHY SHAWN, CLINTON, KIM P.N, ZITTRITSCH, TERRANCE JOHN
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A method and system for defining, placing and routing kernels for a family of integrated circuits is provided. The integrated circuits are defined using repeatable row and column circuit types. Kernels are defined by the intersections of the row and column circuit types in the array. The kernels are placed and routed automatically for each member of the family of integrated circuit arrays, each member being generally characterized by a different size, i.e., a different number of repeatable row or column circuit types.