Method for fabricating a capped gate conductor
A gate structure in a CMOS is fabricated wherein the encapsulation material is self-aligned with the gate conductor and the gate channel. The gate conductor is formed subsequent to the device doping and heat cycles for formulation of the source and drain junction, and is preferably of greater width...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | A gate structure in a CMOS is fabricated wherein the encapsulation material is self-aligned with the gate conductor and the gate channel. The gate conductor is formed subsequent to the device doping and heat cycles for formulation of the source and drain junction, and is preferably of greater width than the gate. |
|---|