Mechanism for high bandwidth DMA transfers in a PCI environment

Mechanism for high bandwidth DMA transfers in a PCI environment

A method and apparatus for maximizing the performance of DMA transfers over a PCI TM bus are provided which includes a Per-Channel Retry count, Double Buffer Management, Wait Enable functionality, Back Up register functionality, Gather/Scatter mapping, a method for minimization of PIO writes, Read S...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ADILETTA, MATTHEW JAMES, BERNSTEIN, DEBRA, WOLRICH, GILBERT M, HO, SAMUEL, WHEELER, WILLIAM R
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A method and apparatus for maximizing the performance of DMA transfers over a PCI TM bus are provided which includes a Per-Channel Retry count, Double Buffer Management, Wait Enable functionality, Back Up register functionality, Gather/Scatter mapping, a method for minimization of PIO writes, Read Semaphore functionality, a method for servicing of DMA transfers during FMU latency periods, Valid bit functionality, high and low water thresholds, and re-usable page tables.