Method for user-controlled I/O switching during in-circuit programming of CPLDs through the IEEE 1149.1 test access port

A programmable logic device operable to generate different control signals during a time interval when it is being reconfigured includes a plurality of I/O pins (18a-18f), boundary scan circuitry (14) operatively connected to the I/O pins for loading a new set of data and for driving the new set of data onto the I/O pins, and means for programming (33) the programmable logic device on a row-by-row basis when loaded with program instructions. Control circuitry (31a) is provided to control the programming means to be operated on a self-timed interval for programming each row so that the boundary scan circuitry can be loaded with additional sets of data to generate the different control signals. The control circuitry includes a programming timer register (70) and a programming status register (68).