Defect control in formation of dielectrically isolated semiconductor device regions

Oxygen induced lattice slip defects are reduced in device layer 26 of silicon-on-insulator structure 12, 16, 26. At the bottom of trenches 22 notches 28 are etched into the dielectric layer 16. A thermal oxide process provides protrusions 30 of oxide into the substrate. The protrusions 30 direct def...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	MCLACHLAN, CRAIG J
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	Oxygen induced lattice slip defects are reduced in device layer 26 of silicon-on-insulator structure 12, 16, 26. At the bottom of trenches 22 notches 28 are etched into the dielectric layer 16. A thermal oxide process provides protrusions 30 of oxide into the substrate. The protrusions 30 direct defects into the support layer 12.