Application of thin crystalline Si3N4 liners in shallow trench isolation (STI) structures

Silicon integrated circuits use a crystalline layer of silicon nitride (Si3N4) in shallow trench isolation (STI) structures as an O2-barrier film. The crystalline Si3N4 lowers the density of electron traps as compared with as-deposited, amorphous Si3N4. Further, a larger range of low-pressure chemic...

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Bibliographische Detailangaben
Hauptverfasser:	DOBUZINSKY, DAVID M, HAMMERL, ERWIN, PALM, HERBERT, AJMERA, ATUL, HO, MOSEMAN, JAMES F, RAMAC, SAMUEL C, FUGARDI, STEPHEN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS
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Beschreibung
Zusammenfassung:	Silicon integrated circuits use a crystalline layer of silicon nitride (Si3N4) in shallow trench isolation (STI) structures as an O2-barrier film. The crystalline Si3N4 lowers the density of electron traps as compared with as-deposited, amorphous Si3N4. Further, a larger range of low-pressure chemical-vapor deposited (LPCVD) Si3N4 films can be deposited, providing a larger processing window for thickness controllability. An LPCVD-Si3N4 film is deposited at temperatures of 720 DEG C. to 780 DEG C. The deposited film is in an amorphous state. Subsequently, a high-temperatures rapid-thermal anneal in pure nitrogen or ammonia is conducted at 1050 DEG C. to 1100 DEG for 60 seconds.