Apparatus and method for checking logic circuit
An apparatus and method for checking logic circuit checks logic element influenced by hot carriers in the logic circuit. The present invention comprises means for measuring rising transition time tr (or falling transition time tf) of signal generated by logic element comprising one portion of the lo...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | An apparatus and method for checking logic circuit checks logic element influenced by hot carriers in the logic circuit. The present invention comprises means for measuring rising transition time tr (or falling transition time tf) of signal generated by logic element comprising one portion of the logic circuit; means for calculating a ratio (DUTY) of rising transition time tr (or falling transition time tf) and operation period T of the signal; and means for comparing said DUTY with maximum allowable duty (DUTYMAX), in order to detect the logic element having DUTY exceeding maximum allowable duty (DUTYMAX). |
---|