System for controlling mode of operation of a data cache based on storing the DMA state of blocks by setting the DMA state to stall
A computer system for controlling the mode of operation of a data cache. When a DMA state machine detects a DMA cycle to a memory block, the machine interrupts the processor so the processor sets a new value of the DMA state to control the mode of cache operation associated with the block.
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Sprache: | eng |
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Zusammenfassung: | A computer system for controlling the mode of operation of a data cache. When a DMA state machine detects a DMA cycle to a memory block, the machine interrupts the processor so the processor sets a new value of the DMA state to control the mode of cache operation associated with the block. |
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