Circuit for generating a low power CPU clock signal

A circuit for generating a low power CPU clock signal is disclosed. The circuit includes a multi-frequency oscillator having a plurality of output signals of various frequencies that are input to a signal selector. The signal selector is controlled to route one of the various frequency signals to the output, which provides the CPU clock oscillating signal. The frequency of the CPU clock signal is compared against a reference oscillatory signal that is generated by a reference oscillator. Based upon the comparison, the frequency comparator generates an output signal that is used to control the signal selector to select an input signal of either higher or lower frequency, depending upon the comparison. Finally, an enable signal is provided for selectively enabling the operation of the CPU clock oscillating circuit.