Compensation circuit for input stage of high speed operational amplifier
A compensation circuit in a high speed integrated circuit operational amplifier that includes an input stage having first and second outputs connected to emitters of first and second PNP cascode transistors. A base of an cascode transistor is coupled to a collector of the first PNP cascode transisto...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | MURRAY KENNETH W |
| description | A compensation circuit in a high speed integrated circuit operational amplifier that includes an input stage having first and second outputs connected to emitters of first and second PNP cascode transistors. A base of an cascode transistor is coupled to a collector of the first PNP cascode transistor. A resistor circuit is connected between the collectors of the second PNP cascode transistor and the NPN cascode transistor. First and second inputs of a diamond follower output buffer are connected to the collectors of the NPN cascode transistor and second PNP cascode transistor, respectively. A compensation circuit includes first and second compensation capacitors connected to the collectors of the NPN cascode transistor and the second PNP cascode transistor, respectively, to prevent instability of an output voltage of the diamond follower buffer circuit. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US5623229A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US5623229A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US5623229A3</originalsourceid><addsrcrecordid>eNqFyrEKwjAQBuAuDqI-g_cCLikKjlIq3dW5HPFPe5DmjiR9f0Hcnb7l2zZDp4shFa6iibxkv0qloJkk2VqpVJ5AGmiWaaZiwJvUkL-fI_FiUYIg75tN4Fhw-Llrjvf-2Q0nmI4oxh4JdXw9zhfXOne9tf_HBwZFM_4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Compensation circuit for input stage of high speed operational amplifier</title><source>esp@cenet</source><creator>MURRAY; KENNETH W</creator><creatorcontrib>MURRAY; KENNETH W</creatorcontrib><description>A compensation circuit in a high speed integrated circuit operational amplifier that includes an input stage having first and second outputs connected to emitters of first and second PNP cascode transistors. A base of an cascode transistor is coupled to a collector of the first PNP cascode transistor. A resistor circuit is connected between the collectors of the second PNP cascode transistor and the NPN cascode transistor. First and second inputs of a diamond follower output buffer are connected to the collectors of the NPN cascode transistor and second PNP cascode transistor, respectively. A compensation circuit includes first and second compensation capacitors connected to the collectors of the NPN cascode transistor and the second PNP cascode transistor, respectively, to prevent instability of an output voltage of the diamond follower buffer circuit.</description><edition>6</edition><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>1997</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19970422&DB=EPODOC&CC=US&NR=5623229A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19970422&DB=EPODOC&CC=US&NR=5623229A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MURRAY; KENNETH W</creatorcontrib><title>Compensation circuit for input stage of high speed operational amplifier</title><description>A compensation circuit in a high speed integrated circuit operational amplifier that includes an input stage having first and second outputs connected to emitters of first and second PNP cascode transistors. A base of an cascode transistor is coupled to a collector of the first PNP cascode transistor. A resistor circuit is connected between the collectors of the second PNP cascode transistor and the NPN cascode transistor. First and second inputs of a diamond follower output buffer are connected to the collectors of the NPN cascode transistor and second PNP cascode transistor, respectively. A compensation circuit includes first and second compensation capacitors connected to the collectors of the NPN cascode transistor and the second PNP cascode transistor, respectively, to prevent instability of an output voltage of the diamond follower buffer circuit.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1997</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqFyrEKwjAQBuAuDqI-g_cCLikKjlIq3dW5HPFPe5DmjiR9f0Hcnb7l2zZDp4shFa6iibxkv0qloJkk2VqpVJ5AGmiWaaZiwJvUkL-fI_FiUYIg75tN4Fhw-Llrjvf-2Q0nmI4oxh4JdXw9zhfXOne9tf_HBwZFM_4</recordid><startdate>19970422</startdate><enddate>19970422</enddate><creator>MURRAY; KENNETH W</creator><scope>EVB</scope></search><sort><creationdate>19970422</creationdate><title>Compensation circuit for input stage of high speed operational amplifier</title><author>MURRAY; KENNETH W</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5623229A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1997</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>MURRAY; KENNETH W</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MURRAY; KENNETH W</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Compensation circuit for input stage of high speed operational amplifier</title><date>1997-04-22</date><risdate>1997</risdate><abstract>A compensation circuit in a high speed integrated circuit operational amplifier that includes an input stage having first and second outputs connected to emitters of first and second PNP cascode transistors. A base of an cascode transistor is coupled to a collector of the first PNP cascode transistor. A resistor circuit is connected between the collectors of the second PNP cascode transistor and the NPN cascode transistor. First and second inputs of a diamond follower output buffer are connected to the collectors of the NPN cascode transistor and second PNP cascode transistor, respectively. A compensation circuit includes first and second compensation capacitors connected to the collectors of the NPN cascode transistor and the second PNP cascode transistor, respectively, to prevent instability of an output voltage of the diamond follower buffer circuit.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US5623229A |
| source | esp@cenet |
| subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
| title | Compensation circuit for input stage of high speed operational amplifier |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T08%3A11%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MURRAY;%20KENNETH%20W&rft.date=1997-04-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS5623229A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |