MOS precision capacitor with low voltage coefficient

A MOS precision capacitor is formed in an integrated circuit including a p-mos and n-mos transistor without adding to the process steps used in forming the p-mos and n-mos transistor. The MOS precision capacitor includes a n-well formed concurrently with a n-well of the p-mos transistor, a n-type region formed concurrently with a threshold adjust region of the p-mos transistor, an oxide layer formed concurrently with gate oxide layers of the p-mos and n-mos transistors, a first electrode formed over the n-type region, at least one n+ region formed concurrently with source and drain regions of the n-mos transistor by self aligning to the sidewall of the first electrode, and a second electrode connected to the at least one n+ region. Good gate oxide tracking between the MOS precision capacitor, the p-mos transistor, and the n-mos transistor, is provided by forming the n-type region of the MOS precision capacitor with a dopant concentration approximately equal to that of the threshold adjust region of the p-mos transistor, and approximately within an order of magnitude of that of the n-mos transistor. Good ground isolation for the MOS precision capacitor is provided by forming the MOS precision capacitor in its own n-well. Low voltage and signal frequency dependency for the MOS precision capacitor is provided by respectively forming the n-type and n+ regions between the first and second electrodes of the MOS precision capacitor such that their respective dopant concentrations are greater than that of the n-well.