Signal-processing circuit

A signal-processing circuit has the first reference-voltage setting circuit for setting a lower-limit reference voltage and an upper-limit reference voltage for the first A/D converter, a data-storing section for storing digital data obtained by the first A/D converter, and the second reference-voltage setting circuit for setting a lower-limit reference voltage for the second A/D converter to a voltage that is lower than the voltage corresponding to the digital data stored in the data-storing section and that is higher than the lower-limit reference voltage set by the first reference-voltage setting circuit, as well as for setting an upper-limit reference voltage for the second A/D converter to a voltage that is higher than the voltage corresponding to the digital data stored in the data-storing section and that is lower than the upper-limit reference voltage set by the first reference-voltage setting circuit. Thus, the signal-processing circuit releases digital data based on the data obtained by the second A/D converter. This arrangement makes it possible to convert the analog data released from the line sensor into digital data at high speeds with high resolution and release the resulting data.