Process of fabricating stacked capacitor configuration for dynamic random access memory

A process of fabricating a capacitor configuration for DRAM devices is disclosed which has an increased capacitance and is structurally rigid. The process provides an umbrella-shaped capacitor configuration formed over the surface of a semiconductor substrate. The capacitor has an electrode surface...

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Hauptverfasser: LUR, WATER
Format: Patent
Sprache:eng
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Zusammenfassung:A process of fabricating a capacitor configuration for DRAM devices is disclosed which has an increased capacitance and is structurally rigid. The process provides an umbrella-shaped capacitor configuration formed over the surface of a semiconductor substrate. The capacitor has an electrode surface area at least five times that of the conventional capacitor configuration based on the same physical dimension scales. The capacitor configuration for DRAM devices is easy to fabricate and may achieve a high fabrication yield rate as a result of its rigid structural configuration.