Method and apparatus for retarting pipeline processing

A method and apparatus for restarting an instruction processing pipeline after servicing one or more interlock processing faults. A pipeline architecture is defined in which processing interdependencies (such as instruction latencies, resource conflicts, cache accesses, virtual address translations and sign extend operations) are presumed not to be present so as to increase pipeline throughput. Interdependencies which actually occur appear as processing faults which then are serviced. At the completion of the servicing, pipeline restarting operations occur, during which the portions of the pipeline which are invalidated are preloaded. Preloading includes backing-up the invalidated stages and re-executing such stages with corrected information so as to fill the pipeline. The pipeline portions (e.g., stages) which are invalidated are determined by the type of processing fault which occurs. Upon completion of preloading, normal instruction pipeline processing resumes.