Expandable high performance FIFO design which includes memory cells having respective cell multiplexors

An arrangement of cells with input and output steering circuitry as well as internal shifting capabilities is disclosed which advantageously provides a first in/first out (FIFO) register circuit which can be written to and read from in contiguous clock cycles. The FIFO register circuit is provided w...

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Hauptverfasser: AMINI, NADER, BRANNON, SHERWOOD, LOHMAN, TERENCE J, BOURY, BECHARA E
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creator AMINI
NADER
BRANNON
SHERWOOD
LOHMAN
TERENCE J
BOURY
BECHARA E
description An arrangement of cells with input and output steering circuitry as well as internal shifting capabilities is disclosed which advantageously provides a first in/first out (FIFO) register circuit which can be written to and read from in contiguous clock cycles. The FIFO register circuit is provided with an arrangement of self contained FIFO cells, each cell containing its own input multiplexer and control circuitry.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
title Expandable high performance FIFO design which includes memory cells having respective cell multiplexors
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