Low-voltage low-power dynamic folded sense amplifier
A sense amplifier circuit includes a voltage developing stage which receives first and second data inputs, din1 and din2, and generates, in response to a first control signal PHI 1, a differential voltage indicative of a voltage difference between the first and second data inputs, din1 and din2; a f...
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Zusammenfassung: | A sense amplifier circuit includes a voltage developing stage which receives first and second data inputs, din1 and din2, and generates, in response to a first control signal PHI 1, a differential voltage indicative of a voltage difference between the first and second data inputs, din1 and din2; a full-swing locking stage which generates and latches, in response to a second control signal PHI 2, first and second latched data outputs, dout1 and dout2, from the differential voltage generated by the voltage developing stage; and a voltage equalization stage which equalizes, in response to a third control signal PHI 0, voltages on data lines respectively connected to the first and second data outputs, dout1 and dout2. Timing of the first, second and third control signals, PHI 1, PHI 2 and PHI 0, is such that the first control signal is activated after a finite period following the initial activation of the third control signal PHI 0, and the second control signal PHI 2 is activated after a finite period following the initial activation of the first control signal PHI 1. To minimize power consumption of the sense amplifier circuit, the first control signal PHI 1 is deactivated when the full-swing locking stage is in operation and the voltage developing stage is not needed, and the third control signal PHI 0 is deactivated when either the voltage developing or full-swing locking stage is in operation and the voltage equalization stage is not needed. |
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