Active matrix for liquid crystal displays having two switching means and discharging means per pixel

An active matrix for liquid crystal displays having a plurality of picture elements, a plurality of address buses to which an address signal having a high signal level and a low steady state signal level is applied, and a plurality of data buses orthogonal to the address buses. Each picture element...

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Bibliographische Detailangaben
Hauptverfasser:	OGURTSOV, OLEG F, KAZUROV, BORIS I, KRASNIKOV, GENNADI Y, CHERNOROTOV, BORIS P
Format:	Patent
Sprache:	eng
Schlagworte:	ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CRYPTOGRAPHY DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING DISPLAY EDUCATION FREQUENCY-CHANGING NON-LINEAR OPTICS OPTICAL ANALOGUE/DIGITAL CONVERTERS OPTICAL LOGIC ELEMENTS OPTICS PHYSICS SEALS TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF
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Beschreibung
Zusammenfassung:	An active matrix for liquid crystal displays having a plurality of picture elements, a plurality of address buses to which an address signal having a high signal level and a low steady state signal level is applied, and a plurality of data buses orthogonal to the address buses. Each picture element includes at least one display electrode device; a first switching device coupled between the display electrode device and a first respective one of the address buses and a respective one of the data buses; and a second switching device coupled between the display electrode device and a second respective one of the address buses and the respective data bus. The second switching device includes a device for preventing the display electrode from discharging whereby a substantially same voltage is maintained at the display electrode during the time when the address signal changes from the high level to the low level.