Method of computing multi-conductor parasitic capacitances for VLSI circuits

A method of computing parasitic capacitances between multiple electrical conductors within an electric circuit computes a division of the circuit's physical layout into a plurality of windows. The parasitic capacitances associated with the conductors of each window are computed, and the results...

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Bibliographische Detailangaben

Hauptverfasser:	BEAVEN, MICHAEL W, SMITH, JR., WILLIAM R, BRODIE, RICHARD A
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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