Method and structure for routing power for optimum cell utilization with two and three level metal in a partially predesigned integrated circuit

An integrated circuit structure which employs at least two metal levels overlying an array of circuit elements. Each metal level contains signal routing resources which can be used for supplying power and interconnecting circuit elements. The metal levels include a first metal level directly overlying the array of circuit elements, intermediate metal levels (if there are more than two metal levels), and a top metal level overlying all other metal levels. Power carrying tracks are disposed in the top metal level. Power antennae are disposed in the first metal level, but only where necessary to provide power to the circuit elements. The power antennae are for connecting the power carrying tracks to the circuit elements. Power bridges are disposed in intermediate metal levels between the first metal level and the top metal level. The power bridges are for connecting the power carrying tracks to the power antennae. Contacts to the first metal level are used as a means by which the power antennae are connected to the circuit elements. Vias to the metal levels overlying the first metal level are used as a means by which the power carrying tracks are connected to the power bridges and the power antennae, and by which the power bridges are connected to other power bridges and the power antennae.