Data processing apparatus having first bus with bus arbitration independent of CPU, second bus for CPU, and gate between first and second buses

An image processing apparatus containing a first bus, a second bus, a CPU connected to the first bus, a plurality of bus user units respectively connected to the second bus, a bus control unit connected with each of the plurality of bus user units and the CPU, and a bus connect/isolate gate unit con...

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Bibliographische Detailangaben

Hauptverfasser:	HAGIWARA, TAKASHI, YASO, KENJI
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION
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