Method of fabricating semiconductor devices using an intermediate grinding step
In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, a brittle, excessive deposition on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying...
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creator | IMAOKA KAZUNORI FUJISAWA YOICHI |
description | In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, a brittle, excessive deposition on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying wafer is exposed. The removal of the excessive deposition on the wafer edge reduces dust generation caused from crack and peel-off of the excessive deposition on the wafer edge, even if the wafer edge contacts a jig, and the like. Thus, the reduction in dust generation improves production yields of highly integrated semiconductor devices. |
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The removal of the excessive deposition on the wafer edge reduces dust generation caused from crack and peel-off of the excessive deposition on the wafer edge, even if the wafer edge contacts a jig, and the like. Thus, the reduction in dust generation improves production yields of highly integrated semiconductor devices.</description><edition>6</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; DRESSING OR CONDITIONING OF ABRADING SURFACES ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS ; GRINDING ; MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING ; PERFORMING OPERATIONS ; POLISHING ; SEMICONDUCTOR DEVICES ; TRANSPORTING</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950620&DB=EPODOC&CC=US&NR=5426073A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950620&DB=EPODOC&CC=US&NR=5426073A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IMAOKA; KAZUNORI</creatorcontrib><creatorcontrib>FUJISAWA; YOICHI</creatorcontrib><title>Method of fabricating semiconductor devices using an intermediate grinding step</title><description>In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, a brittle, excessive deposition on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying wafer is exposed. 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The removal of the excessive deposition on the wafer edge reduces dust generation caused from crack and peel-off of the excessive deposition on the wafer edge, even if the wafer edge contacts a jig, and the like. Thus, the reduction in dust generation improves production yields of highly integrated semiconductor devices.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS DRESSING OR CONDITIONING OF ABRADING SURFACES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS GRINDING MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING PERFORMING OPERATIONS POLISHING SEMICONDUCTOR DEVICES TRANSPORTING |
title | Method of fabricating semiconductor devices using an intermediate grinding step |
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