LCD addressing system

An addressing method and apparatus addresses faster responding liquid crystal display panels (LCDs) so that video rate, high information content LCDs having time constants on the order of 50 ms or less are perceived as having improved contrast by limiting peak voltage levels across the pixels. In a preferred embodiment, a first set of LCD electrodes is continuously driven with signals each comprising a train of pulses that are periodic in time, have a common period T, are independent of the information to be displayed, and are preferably orthonormal. Plural column signals are generated from the collective information states of the pixels defined by the overlap with a second electrode pattern. Each column signal is proportional to the sum, obtained by considering each pixel in the column, of the exclusive- or (XOR) products of the logic level of the amplitude of each row signal times the logic level of the information state of the pixel corresponding to that row. Hardware implementation comprises an external video source, a controller that receives and formats video data and timing information, a storage device that stores display data, a row signal generator, a column signal generator, and at least one LCD panel. Alternative embodiments provide circuits to reduce the number of column voltage levels required to generate a displayed image.