Integrated circuit charge pump voltage level converter

An on-chip voltage conversion circuit arrangement including charge pump logic circuitry, a dual-phase clock pulse circuit, and a comparator circuit. The dual-phase clock pulse circuit produces charge and pump pulses to drive the charge pump logic circuit while it is supplied with an input voltage level for conversion to a desired output voltage level. The charge pump logic circuit includes an output capacitor for producing the desired voltage level in a semiconductor chip to be fabricated. The output capacitor is supplied with electric charge during alternating charge and pump cycles from one or two charging capacitors. The output voltage is compared with a voltage reference permit enablement and disablement of charging and discharging action by the capacitors.