Architecture and apparatus for image generation

A system for image generation comprising a plurality of renderers, each having a geometry processor and a rasterizer, that operate in parallel to compute pixel values for a set of primitive objects that comprise the image to be rendered. The geometry processor transforms graphics primitive objects from their native object coordinates to screen coordinates. The rasterizer consists of an array of enhanced memory devices having a processor and memory for each pixel in a region of a screen. The processors and their associated memories operate in SIMD fashion on screen space primitive descriptions to compute and store pixel values for an entire such region. The enhanced memory devices further comprise compositors for combining their pixel values, for example, based on a visibility test, with those from a corresponding memory device of another rasterizer. The image generation system may further comprise shaders, which compute pixel colors based on pixel values computed in the plurality of renderers, and video frame buffers, which store these pixel colors and refresh a raster display device. The shaders and frame buffers consist of a renderer with additional memory devices that store texture and image data. Also disclosed are enhanced memory devices and rasterizers for use in the present image generation system.